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MM74C89 64-Bit 3-STATE Random Access Read/Write Memory
October 1987 Revised January 1999
MM74C89 64-Bit 3-STATE Random Access Read/Write Memory
General Description
The MM74C89 is a 16-word by 4-bit random access read/ write memory. Inputs to the memory consist of four address lines, four data input lines, a write enable line and a memory enable line. The four binary address inputs are decoded internally to select each of the 16 possible word locations. An internal address register latches the address information on the positive to negative transition of the memory enable input. The four 3-STATE data output lines working in conjunction with the memory enable input provide for easy memory expansion. Address Operation: Address inputs must be stable tSA prior to the positive to negative transition of memory enable. It is thus not necessary to hold address information stable for more than tHA after the memory is enabled (positive to negative transition of memory enable). Write Operation: Information present at the data inputs is written into the memory at the selected address by bringing write enable and memory enable LOW. Read Operation: The complement of the information which was written into the memory is non-destructively read out at the four outputs. This is accomplished by selecting the desired address and bringing memory enable LOW and write enable HIGH. When the device is writing or disabled the output assumes a 3-STATE (Hi-z) condition.
Features
s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: 3.0V to 15V 1.0V 0.45 VCC (typ.)
s Low power TTL compatibility: fan out of 2 driving 74L s Low power consumption: s 3-STATE output
Note: The timing is different than the DM7489 in that a positive to negative transition of the memory enable must occur for the memory to be selected.
100 nW/package (typ.) s Fast access time: 130 ns (typ.) at VCC = 10V
Ordering Code:
Order Number MM74C89N Package Number Package Description N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Connection Diagram
Pin Assignments for DIP
Truth Table
ME WE L L H H L H L H Operation Write Read Condition of Outputs 3-STATE Complement of Selected Word
Inhibit, Storage 3-STATE Inhibit, Storage 3-STATE
Top View
(c) 1999 Fairchild Semiconductor Corporation
DS005888.prf
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MM74C89
Logic Diagram
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MM74C89
Absolute Maximum Ratings(Note 1)
Voltage at any Pin Operating Temperature Range Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range 700 mW 500 mW 3.0V to 15V -0.3V to VCC +0.3V -40C to +85C -65C to +150C
Absolute Maximum VCC Lead Temperature (TL) (Soldering, 10 seconds)
18V 260C
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Range" they are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range, unless otherwise noted Symbol CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) IOZ ICC VIN(1) VIN(0) VOUT(1) VOUT(0) ISOURCE ISOURCE ISINK ISINK Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Logical "1" Input Current Logical "0" Input Current Output Current in High Impedance State Supply Current Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Output Source Current (P-Channel) Output Source Current (P-Channel) Output Sink Current (N-Channel) Output Sink Current (N-Channel) CMOS/LPTTL INTERFACE VCC = 4.75V VCC = 4.75V VCC = 4.75V, IO = -360 A VCC = 4.75V, IO = +360 A VCC = 5.0V, VOUT = 0V TA = 25C VCC = 10V, VOUT = 0V TA = 25C VCC = 5.0V, VOUT = VCC TA = 25C VCC = 10V, VOUT = VCC TA = 25C 8.0 16 mA 1.75 3.6 mA -8.0 -15 mA -1.75 -3.3 2.4 0.4 VCC - 1.5 0.8 V V V V mA VCC = 5.0V VCC = 10V VCC = 5.0V VCC = 10V VCC = 5.0V, IO = -10 A VCC = 10V, IO = -10 A VCC = 5.0V, IO = +10 A VCC = 10V, IO = +10 A VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V, V = 15V VCC = 15V, VO = 0V VCC = 15V -1.0 -1.0 -0.005 -0.005 0.005 -0.005 0.05 300 1.0 4.5 9.0 0.5 1.0 1.0 3.5 8.0 1.5 2.0 V V V V V V V V A A A A A Parameter Conditions Min Typ Max Units
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
3
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MM74C89
AC Electrical Characteristics
TA = 25C, CL = 50 pF, unless otherwise noted Symbol tpd tACC tSA tHA tME tSR tWS tWE tHD tSD t1H, t0H Parameter Propagation Delay from Memory Enable Access Time from Address Input Address Setup Time Address Hold Time Memory Enable Pulse Width Write Enable Setup Time for a Read Write Enable Setup Time for a Write Write Enable Pulse Width Data Input Hold Time Data Input Setup Propagation Delay from a Logical "1" or Logical "0" to the High Impedance State from Memory Enable t1H, t0H Propagation Delay from a Logical "1" or Logical "0" to the High Impedance State from Write Enable CIN COUT CPD Input Capacity Output Capacity Power Dissipation Capacity
(Note 2)
Conditions Min Typ 270 100 350 130 150 60 60 40 400 150 0 0 tME tME 300 100 50 25 50 25 180 -85 300 120 160 60 250 90 Max 500 220 650 280 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V, tWS = 0 VCC = 10V, tWS = 0 VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V, CL = 5 pF, RL = 10k VCC = 10V, CL = 5 pF, RL = 10k
VCC = 50V, CL = 5 pF, RL = 10k VCC = 10V, CL = 5 pF, RL = 10k
180 85
300 120
ns ns
Any Input (Note 3) Any Output (Note 3) (Note 4)
5 6.5 230
pF pF pF
Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note, AN-90.
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MM74C89
AC Test Circuits
t0H t1H
Switching Time Waveforms
t0H t1H
Read Cycle
Write Cycle
Read Modify Write Cycle
tf = 10 ns tr = 60 ns
5
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MM74C89 64-Bit 3-STATE Random Access Read/Write Memory
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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